engineering computer science MCQ #128

In a pipelined processor, what is the CPI (cycles per instruction) if there are 5 stages and no stalls?

engineering computer science MCQ #128

  1. Question 1

    Q1. In a pipelined processor, what is the CPI (cycles per instruction) if there are 5 stages and no stalls?

    • A) 1/5
    • B) 1
    • C) 5
    • D) 1 + (1/5)

    Answer: 1

    Explanation: In an ideal pipelined processor with no stalls, CPI = 1, as one instruction is completed per cycle.